Paging

1>Paging allows the logically continuous memory to be scattered through the physical memory out of order.
2>Suppose the logical address space is 2**m, and the page size is 2**n, then the high order m-n bits are designated as page number, while the lower n bits are designated as offset after the particular physical page has been found.
3>The TLB is the quick look up to speed up the page table translation, it will quickly find the entry for the logical address. If the TLB is missing, then we need to look up the page table to find the right entry.
4>If the logical address space is very large, and the page size is relatively small, it will lead to a very large page table. We have to use a couple of techniques such as "multi level page table", "inverted page table" to reduce the size.